Random read up to 600K IOPS Random write up to 600K IOPS Sequential read up to 3.5GB/s Sequential write up to 3GB/s Read latency 75us Write latency 15us
Latest NVMe protocol can be supported by firmware update New Nand flash can be supported by microcode update
SMP architecture 64GB address data space access
Active < 2.5W L1. 2 < 2mW
Supports NVMe 1.3
PCIe Gen1 Gen2 Gen3
Supports up to x4 single endpoint mode (x1,x2,x4)
Supports single root I/O virtualization (SR-IOV)up to 16 VFs
Supports L1 active state power management(ASPM)L1 substates (L1SS)
Supports message signaled interrupt (MSI and MSI-X)
Supports JEDEC DDR3/DDR3L/DDR4/LPDDR3
32-bit DRAM Interface with in-line ECC
Supports up to 2 ranks
TCG-opal 2.0 compliant
Hardware TRNG and SHA256
Secure boot
Supports XTS-AES256
Supports RAID5/RAID6
Supports SM2/SM3/SM4
SECDED for all on-chip RAMs
Full path data protection
High performance XOR engine
Supports 8 channels with up to 16 LUNs for each channel
Supports 1.2V/1.8V flash I/O ONFI 4.0/Toggle 3.0, up to 800MT/s
Microcode architecture, flexibly supports 2D/3D SLC, MLC, TLC and QLC
Supports 1-plane, 2-plane, and 4
Adaptive code rate from 0.65~0.94
Up to four check matrix
Supports 4 soft bits
Multi-core in SMP
On-Chip temperature sensor
JTAG/SMBUS debug interface
Supports NVMe management interface
Turn-key solution including ASIC/SDK/FW,
development tools and evaluation board
